This is a record of the Instruction Set Architecture (ISA) of the CPU we designed together, inspired by the steps necessary to execute Euclid's Algorithm for finding the Greatest Common Divisor (GCD).
In addition to RAM, the CPU has the following registers.
Code | Assembly | Comment |
0000 | SUB A B | Compute A-B and store the result in A. |
0001 | ZERO A | If A=0, set the Test register to 1; otherwise, set Test to 0. |
0010 | GT A B | If A>B, set the Test register to 1; otherwise, set Test to 0. |
0011 | MOVE A B | Copy the value of B into A. |
0100 | GOTO A | Set the IP to the address A. |
0101 | CGOTO A | If Test=1, set the IP to the address A; otherwise, increment IP as normal. |
0110 | HALT | Stop executing new instructions. |
Label | Assembly | Binary | Hex |
top: | ZERO m | 0001 00000000001110 00000000000000 | 10038000 |
| CGOTO gcdn | 0101 00000000001000 00000000000000 | 50020000 |
| ZERO n | 0001 00000000001111 00000000000000 | 1003C000 |
| CGOTO gcdm | 0101 00000000001010 00000000000000 | 50028000 |
| GT m n | 0010 00000000001110 00000000001111 | 2003800F |
| CGOTO mgtn | 0101 00000000001100 00000000000000 | 50030000 |
| SUB n m | 0000 00000000001111 00000000001110 | 0003C00E |
| GOTO top | 0100 00000000000000 00000000000000 | 40000000 |
gcdn: | MOVE gcd n | 0011 00000000010000 00000000001111 | 3004000F |
| HALT | 0110 00000000000000 00000000000000 | 60000000 |
gcdm: | MOVE gcd m | 0011 00000000010000 00000000001110 | 3004000E |
| HALT | 0110 00000000000000 00000000000000 | 60000000 |
mgtn: | SUB m n | 0000 00000000001110 00000000001111 | 0003800F |
| GOTO top | 0100 00000000000000 00000000000000 | 40000000 |
m: | 54 | 00000000000000000000000000110110 | 00000036 |
n: | 24 | 00000000000000000000000000011000 | 00000018 |
gcd: | 0 | 00000000000000000000000000000000 | 00000000 |